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Silicon Labs /BGM240PA32VNN /FRC_NS /PAUSECTRL

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Interpret as PAUSECTRL

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https://regviz.com/r/Silicon Labs/EFR32MG24A010F1024IM40/FRC_S/PAUSECTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FRAMEDETPAUSEEN)FRAMEDETPAUSEEN 0 (TXINTERLEAVEWRITEPAUSEEN)TXINTERLEAVEWRITEPAUSEEN 0 (RXINTERLEAVEWRITEPAUSEEN)RXINTERLEAVEWRITEPAUSEEN 0 (INTERLEAVEREADPAUSEEN)INTERLEAVEREADPAUSEEN 0 (TXSUBFRAMEPAUSEEN)TXSUBFRAMEPAUSEEN 0 (RXWCNTMATCHPAUSEEN)RXWCNTMATCHPAUSEEN 0CONVPAUSECNT0INTERLEAVEWRITEPAUSECNT 0INTERLEAVEREADPAUSECNT

Description

No Description

Fields

FRAMEDETPAUSEEN

Frame detect pause enable
TXINTERLEAVEWRITEPAUSEEN

Transmit interleaver write pause enable
RXINTERLEAVEWRITEPAUSEEN

Receive interleaver write pause enable
INTERLEAVEREADPAUSEEN

Interleaver read pause enable
TXSUBFRAMEPAUSEEN

Transmit subframe pause enable
RXWCNTMATCHPAUSEEN

Receive wcnt match pause enable
CONVPAUSECNT

Convolutional decoder pause setting
INTERLEAVEWRITEPAUSECNT

Interleaver write pause count
INTERLEAVEREADPAUSECNT

Interleaver read pause count

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data